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29 7.eight 0.12 A5 259 3.9 0.12 A6 246 4.1 0.13 A7 492 two.0 0.13 A8 140 7.1 0.Future Web 2021, 13,16 of120 A1 – (13,8)Number of
29 7.8 0.12 A5 259 three.9 0.12 A6 246 four.1 0.13 A7 492 2.0 0.13 A8 140 7.1 0.Future Net 2021, 13,16 of120 A1 – (13,eight)Number of Cores60 A8 – (13,four) 40 A6 – (4,eight) A3 – (13,2) 20 A7 – (4,4)A4 – (8,eight);A2 – (13,4)A5 – (8,four)0,2,four,six,0 eight,0 ten,0 Frames per Second (FPS)12,14,16,Figure 9. The number of cores versus frames per second of each configuration on the architecture. The graphs indicate the configuration as quantity of lines of cores and quantity of columns of cores).Table 9 presents the Tiny-YOLOv3 network execution times on various platforms: Intel i7-8700 @ 3.two GHz, GPU RTX 2080ti, and embedded GPU Jetson TX2 and Jetson Nano. The CPU and GPU outcomes had been obtained applying the original Tiny-YOLOv3 network [42] with floating-point representation. The CPU result corresponds for the execution of Tiny-YOLOv3 implemented in C. The GPU result was obtained from the execution of Tiny-YOLOv3 Mouse Epigenetics within the Pytorch environment making use of CUDA libraries.Table 9. Tiny-YOLOv3 execution times on multiple platforms. Software Version Floating-point Floating-point Floating-point Floating-point Fixed-point-16 Fixed-point-8 Platform CPU (Intel i7-8700 @ three.2 GHz) GPU (RTX 2080ti) eGPU (Jetson TX2) [43] eGPU (Jetson Nano) [43] ZYNQ7020 ZYNQ7020 CNN (ms) 819.two 7.5 140 68 FPS 1.2 65.0 17 1.2 7.1 14.The Tiny-YOLOv3 on desktop CPUs is too slow. The inference time on an RTX 2080ti GPU showed a 109 speedup versus the desktop CPU. Working with the proposed accelerator, the inference times have been 140 and 68 ms, within the ZYNQ7020. The low-cost FPGA was 6X (16-bit) and 12X (8-bit) quicker than the CPU with a modest drop in accuracy of 1.4 and 2.1 points, respectively. In comparison with the embedded GPU, the proposed architecture was 15 slower. The benefit of making use of the FPGA may be the energy consumption. Jetson TX2 includes a power close to 15 W, though the proposed accelerator has a power of around 0.5 W. The Nvidia Jetson Nano consumes a maximum of 10 W but is around 12slower than the proposed architecture. five.3. Comparison with Other FPGA implementations The proposed implementation was compared with prior accelerators of TinyYOLOv3. We report the quantization, the operating frequency, the occupation of FPGA resources (DSP, LUTs, and BRAMs), and two efficiency metrics (execution time and frames per second). Moreover, we MRTX-1719 Data Sheet considered three metrics to quantify how efficientlyFuture World-wide-web 2021, 13,17 ofthe hardware resources have been being utilized. Considering that distinctive options usually have a various quantity of resources, it really is fair to think about metrics to somehow normalize the results before comparison. FSP/kLUT, FPS/DSP, and FPS/BRAM identify the amount of each and every resource that is definitely utilised to generate a frame per second. The greater these values, the higher the utilization efficiency of these resources (see Table 10).Table 10. Efficiency comparison with other FPGA implementations. [38] Device Dataset Quant. Freq. (MHz) DSPs LUTs BRAMs Exec. (ms) FPS FPS/kLUT FPS/DSP FPS/BRAM ZYNQZU9EG Pedestrian indicators eight 9.six 104 16 100 120 26 K 93 532.0 1.9 0.07 0.016 0.020 18 200 2304 49 K 70 [39] ZYNQ7020 [41] [40] Ours ZYNQVirtexVX485T US XCKU040 COCO dataset 16 143 832 139 K 384 24.4 32 0.23 0.038 0.16 100 208 27.five K 120 140 7.1 0.26 0.034 0.eight one hundred 208 33.four K 120 68 14.7 0.44 0.068 0.The implementation in [39] would be the only earlier implementation using a Zynq 7020 SoC FPGA. This device has significantly fewer resources than the devices applied within the other works. Our architecture implemented inside the same device was 3.7X and 7.4X more quickly, depend.

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Author: calcimimeticagent